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authorhachem <im@hachem.wtf>2024-09-26 21:40:04 +0200
committerhachem <im@hachem.wtf>2024-09-26 21:40:04 +0200
commit1070a7ee073471af8442826cec54e720be266c7c (patch)
tree8118c244731fa28409b70cedd69f8c6c057f4b33 /libpsi-core/src/core/circuit.rs
parentd65b1c55782f6a9d89cd5bc7c7337397dcf4b85c (diff)
Runtime architecture start
Diffstat (limited to 'libpsi-core/src/core/circuit.rs')
-rw-r--r--libpsi-core/src/core/circuit.rs12
1 files changed, 10 insertions, 2 deletions
diff --git a/libpsi-core/src/core/circuit.rs b/libpsi-core/src/core/circuit.rs
index 65e359a..43f51d0 100644
--- a/libpsi-core/src/core/circuit.rs
+++ b/libpsi-core/src/core/circuit.rs
@@ -2,8 +2,8 @@ use super::{ClassicalRegister, QuantumBit, QuantumGate};
#[allow(dead_code)]
struct QuantumCircuitInstruction {
- target_indices: Vec<i32>,
- control_indices: Vec<i32>,
+ target_indices: Vec<usize>,
+ control_indices: Vec<usize>,
gate: QuantumGate,
}
@@ -22,4 +22,12 @@ impl QuantumCircuit {
instructions: Vec::new(),
}
}
+
+ pub fn apply(&mut self, gate: &QuantumGate, control_bits: &[usize], target_bits: &[usize]) {
+ self.instructions.push(QuantumCircuitInstruction {
+ gate: gate.clone(),
+ target_indices: target_bits.to_vec(),
+ control_indices: control_bits.to_vec(),
+ });
+ }
}